A new representation and associated algorithms for generalized planning

Constructing plans that can handle multiple problem instances is a longstanding open problem in AI. We present a framework for generalized planning that captures the notion of algorithm-like plans and unifies various approaches developed for addressing this problem. Using this framework, and building on the TVLA system for static analysis of programs, we develop a novel approach for computing generalizations of classical plans by identifying sequences of actions that will make measurable progress when placed in a loop. In a wide class of problems that we characterize formally in the paper, these methods allow us to find generalized plans with loops for solving problem instances of unbounded sizes and also to determine the correctness and applicability of the computed generalized plans. We demonstrate the scope and scalability of the proposed approach on a wide range of planning problems.     

Dynamic vs. Oblivious Routing in Network Design

Consider the robust network design problem of finding a minimum cost network with enough capacity to route all traffic demand matrices in a given polytope. We investigate the impact of different routing models in this robust setting: in particular, we compare oblivious routing, where the routing between each terminal pair must be fixed in advance, to dynamic routing, where routings may depend arbitrarily on the current demand. Our main result is a construction that shows that the optimal cost of such a network based on oblivious routing (fractional or integral) may be a factor of Ω(log n) more than the cost required when using dynamic routing. This is true even in the important special case of the asymmetric hose model. This answers a question in (Chekuri, SIGACT News 38(3):106–128, 2007), and is tight up to constant factors. Our proof technique builds on a connection between expander graphs and robust design for single-sink traffic patterns (Chekuri et al., Networks 50(1):50–54, 2007).     

Modal Analysis of the Quasi-Optical Performance of Phase Gratings

This paper is concerned with the analysis of phase gratings as passive quasi-optical multiplexing devices. One important application of such components is in the local oscillator injection chain of heterodyne array receivers. Gaussian beam mode analysis can be applied as a powerful tool when modelling the optical performance of phase gratings in a real submillimeter system of finite throughput and bandwidth. In our experimental investigations we have concentrated on the Dammann Grating (DG) which is a binary optical component and thus straightforward to manufacture. A number of quartz gratings were fabricated and carefully tested to evaluate the practical limitations of such quasi-optical components. Because of its convenient refractive index quartz can be used to produce gratings with very low reflection losses. The results presented confirm DGs to be particularly suitable multiplexers for sparse arrays of finite bandwidth.     

Partitioning large networks without breaking communities

The identification of cohesive communities is a key process in social network analysis. However, the algorithms that are effective for finding communities do not scale well to very large problems, as their time complexity is worse than linear in the number of edges in the graph. This is an important issue for those interested in applying social network analysis techniques to very large networks, such as networks of mobile phone subscribers. In this respect, the contributions of this paper are twofold. First, we demonstrate these scaling issues using a prominent community-finding algorithm as a case study. Then, we show that a two-stage process, whereby the network is first decomposed into manageable subnetworks using a multilevel graph partitioning procedure, is effective in finding communities in networks with more than 10⁶ nodes.     

Adaptive locks: Combining transactions and locks for efficient concurrency

Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming model and maximizes concurrency. At the same time, transactions can suffer from interference that causes them to often abort, from heavy overheads for memory accesses, and from expressiveness limitations (e.g., for I/O operations). In this paper we propose an adaptive locking technique that dynamically observes whether a critical section would be best executed transactionally or while holding a mutex lock. The critical new elements of our approach include the adaptivity logic and cost–benefit analysis, a low-overhead implementation of statistics collection and adaptive locking in a full C compiler, and an exposition of the effects on the programming model. In experiments with both micro and macrobenchmarks we found adaptive locks to consistently match or outperform the better of the two component mechanisms (mutexes or transactions). Compared to either mechanism alone, adaptive locks often provide 3-to-10x speedups. Additionally, adaptive locks simplify the programming model by reducing the need for fine-grained locking: with adaptive locks, the programmer can specify coarse-grained locking annotations and often achieve fine-grained locking performance due to the transactional memory mechanisms.     

Low Voltage Electrowetting-on-Dielectric Platform using Multi-Layer Insulators

A low voltage, two-level-metal, and multi-layer insulator electrowetting-on-dielectric (EWD) platform is presented. Dispensing 300pl droplets from 140nl closed on-chip reservoirs was accomplished with as little as 11.4V solely through EWD forces, and the actuation threshold voltage was 7.2V with a 1Hz voltage switching rate between electrodes. EWD devices were fabricated with a multilayer insulator consisting of 135nm sputtered tantalum pentoxide (Ta(2)O(5)) and 180nm parylene C coated with 70nm of CYTOP. Furthermore, the minimum actuation threshold voltage followed a previously published scaling model for the threshold voltage, V(T), which is proportional to (t/ε(r))(1/2), where t and ε(r) are the insulator thickness and dielectric constant respectively. Device threshold voltages are compared for several insulator thicknesses (200nm, 500nm, and 1μm), different dielectric materials (parylene C and tantalum pentoxide), and homogeneous versus heterogeneous compositions. Additionally, we used a two-level-metal fabrication process, which enables the fabrication of smaller and denser electrodes with high interconnect routing flexibility. We also have achieved low dispensing and actuation voltages for scaled devices with 30pl droplets.     

Efficient monitoring of parametric context-free patterns

Recent developments in runtime verification and monitoring show that parametric regular and temporal logic specifications can be efficiently monitored against large programs. However, these logics reduce to ordinary finite automata, limiting their expressivity. For example, neither can specify structured properties that refer to the call stack of the program. While context-free grammars (CFGs) are expressive and well-understood, existing techniques for monitoring CFGs generate large runtime overhead in real-life applications. This paper demonstrates that monitoring parametric CFGs is practical (with overhead on the order of 12% or lower in most cases). We present a monitor synthesis algorithm for CFGs based on an LR(1) parsing algorithm, modified to account for good prefix matching. In addition, a logic-independent mechanism is introduced to support matching against the suffixes of execution traces.     

Children and careers in IT

David Evans, BCS government relations, looks at what it couldtake to convince kids that the hard stuff is worth doing.     

The influence of solid-state and liquid-phase bonding on fatigue at Al/Al2O3 interfaces

Fracture and fatigue experiments have been conducted on liquid phase bonded (LPB) and solid-state bonded (SSB) aluminum-alumina interfaces. The LPB interfaces contain voids and dendritic FeAl₃ precipitates, whereas SSB interfaces are relatively defect-free. These precipitates result in local embrittlement, yet both interfaces are strong and tough. Upon cyclic loading, mode 1 cracks in both systems grow alternately along the interface and within the A1. The development of a tortuous crack path elevates the apparent fatigue threshold through crack closure. Under mixed mode loading, fatigue cracks approaching SSB interfaces propagate through the A1 rather than along the interface. Conversely, for LPB interfaces, mixed mode cyclic crack growth along the interface occurs in preference to propagation in the A1. Correlation between the striation spacing and the crack tip opening displacement suggests a growth mechanism based on crack tip blunting.